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| a FEATURES 44 V Supply Maximum Ratings VSS to VDD Analog Signal Range Low On Resistance (< 35 ) Ultralow Power Dissipation (< 35 W) Fast Transition Time (160 ns max) Break-Before-Make Switching Action Plug-In Replacement for DG419 APPLICATIONS Precision Test Equipment Precision Instrumentation Battery Powered Systems Sample Hold Systems LC2MOS Precision Mini-DIP Analog Switch ADG419 FUNCTIONAL BLOCK DIAGRAM D S2 S1 IN ADG419 SWITCH SHOWN FOR A LOGIC "1" INPUT GENERAL DESCRIPTION PRODUCT HIGHLIGHTS The ADG419 is a monolithic CMOS SPDT switch. This switch is designed on an enhanced LC2MOS process that provides low power dissipation yet gives high switching speed, low on resistance and low leakage currents. The on resistance profile of the ADG419 is very flat over the full analog input range, ensuring excellent linearity and low distortion. The part also exhibits high switching speed and high signal bandwidth. CMOS construction ensures ultralow power dissipation, making the parts ideally suited for portable and battery powered instruments. Each switch of the ADG419 conducts equally well in both directions when ON and has an input signal range that extends to the supplies. In the OFF condition, signal levels up to the supplies are blocked. The ADG419 exhibits break-beforemake switching action. 1. Extended Signal Range The ADG419 is fabricated on an enhanced LC2MOS process, giving an increased signal range that extends to the supply rails. 2. Ultralow Power Dissipation 3. Low RON 4. Single Supply Operation For applications where the analog signal is unipolar, the ADG419 can be operated from a single rail power supply. The part is fully specified with a single +12 V power supply and will remain functional with single supplies as low as +5 V. REV. A Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781/329-4700 World Wide Web Site: http://www.analog.com Fax: 781/326-8703 (c) Analog Devices, Inc., 1998 ADG419-SPECIFICATIONS1 Dual Supply Parameter ANALOG SWITCH Analog Signal Range RON LEAKAGE CURRENTS Source OFF Leakage I S (OFF) Drain OFF Leakage I D (OFF) Channel ON Leakage I D, IS (ON) DIGITAL INPUTS Input High Voltage, V INH Input Low Voltage, VINL Input Current IINL or IINH DYNAMIC CHARACTERISTICS 2 tTRANSITION (VDD = +15 V 10%, VSS = -15 V 10%, VL = +5 V 10%, GND = 0 V, unless otherwise noted) T Version -55 C to +25 C +125 C VSS to VDD 25 35 0.1 0.25 0.1 0.75 0.4 0.75 45 B Version -40 C to +25 C +85 C VSS to VDD 25 35 0.1 0.25 0.1 0.75 0.4 0.75 45 Units V typ max nA typ nA max nA typ nA max nA typ nA max V min V max A typ A max ns max Test Conditions/Comments VD = 12.5 V, IS = -10 mA VDD = +13.5 V, VSS = -13.5 V VDD = +16.5 V, VSS = -16.5 V VD = 15.5 V, VS = 15.5 V; Test Circuit 2 VD = 15.5 V, VS = 15.5 V; Test Circuit 2 VS = VD = 15.5 V; Test Circuit 3 5 5 5 2.4 0.8 0.005 0.5 15 30 30 2.4 0.8 0.005 0.5 VIN = VINL or VINH 160 200 145 200 Break-Before-Make Time Delay, tD OFF Isolation Channel-to-Channel Crosstalk CS (OFF) CD, CS (ON) POWER REQUIREMENTS IDD ISS IL 30 5 80 90 6 55 0.0001 1 0.0001 1 0.0001 1 30 5 80 70 6 55 0.0001 1 0.0001 1 0.0001 1 ns typ ns min dB typ dB typ pF typ pF typ A typ A max A typ A max A typ A max RL = 300 , CL = 35 pF; VS1 = 10 V, VS2 = 10 V; Test Circuit 4 RL = 300 , CL = 35 pF; VS1 = VS2 = 10 V; Test Circuit 5 RL = 50 , f = 1 MHz; Test Circuit 6 RL = 50 , f = 1 MHz; Test Circuit 7 f = 1 MHz f = 1 MHz VDD = +16.5 V, VSS = -16.5 V VIN = 0 V or 5 V 2.5 2.5 2.5 2.5 2.5 2.5 VL = +5.5 V NOTES 1 Temperature ranges are as follows: B Version: -40C to +85C; T Version: -55C to +125C. 2 Guaranteed by design, not subject to production test. Specifications subject to change without notice. -2- REV. A ADG419 Single Supply (V Parameter ANALOG SWITCH Analog Signal Range RON LEAKAGE CURRENT Source OFF Leakage I S (OFF) Drain OFF Leakage I D (OFF) Channel ON Leakage I D, IS (ON) DIGITAL INPUTS Input High Voltage, V INH Input Low Voltage, VINL Input Current IINL or IINH DYNAMIC CHARACTERISTICS 2 tTRANSITION DD = +12 V 10%, VSS = 0 V, VL = +5 V B Version -40 C to +25 C +85 C 0 to VDD 40 60 0.1 0.25 0.1 0.75 0.4 0.75 10%, GND = 0 V, unless otherwise noted) T Version -55 C to +25 C +125 C 0 to VDD 40 70 0.1 0.25 0.1 0.75 0.4 0.75 Units V typ max nA typ nA max nA typ nA max nA typ nA max V min V max A typ A max ns max Test Conditions/Comments VD = +3 V, +8.5 V, IS = -10 mA VDD = +10.8 V VDD = +13.2 V VD = 12.2 V/1 V, VS = 1 V/12.2 V; Test Circuit 2 VD = 12.2 V/1 V, VS = 1 V/12.2 V; Test Circuit 2 VS = VD = 12.2 V/1 V; Test Circuit 3 5 5 5 2.4 0.8 0.005 0.5 15 30 30 2.4 0.8 0.005 0.5 VIN = VINL or VINH 180 250 170 250 Break-Before-Make Time Delay, tD OFF Isolation Channel-to-Channel Crosstalk CS (OFF) CD, CS (ON) POWER REQUIREMENTS IDD IL 60 60 ns typ 80 90 13 65 0.0001 1 0.0001 1 80 70 13 65 0.0001 1 0.0001 1 dB typ dB typ pF typ pF typ A typ A max A typ A max RL = 300 , CL = 35 pF; VS1 = 0 V/8 V, VS2 = 8 V/0 V; Test Circuit 4 RL = 300 , CL = 35 pF; VS1 = VS2 = +8 V; Test Circuit 5 RL = 50 , f = 1 MHz; Test Circuit 6 RL = 50 , f = 1 MHz; Test Circuit 7 f = 1 MHz f = 1 MHz VDD = +13.2 V VIN = 0 V or 5 V VL = +5.5 V 2.5 2.5 2.5 2.5 NOTES 1 Temperature ranges are as follows: B Version: -40C to +85C; T Version: -55C to +125C. 2 Guaranteed by design, not subject to production test. Specifications subject to change without notice. Table I. Truth Table Logic 0 1 Switch 1 ON OFF ORDERING GUIDE Switch 2 OFF ON PIN CONFIGURATION DIP/SOIC/ SOIC D1 S1 2 8 S2 VSS TOP VIEW GND 3 (Not to Scale) 6 IN 7 ADG419 VDD 4 5 VL Model ADG419BN ADG419BR ADG419BRM ADG419TQ Temperature Ranges -40C to +85C -40C to +85C -40C to +85C -55C to +125C Package Options* N-8 SO-8 RM-8 Q-8 *N = Plastic DIP, Q = Cerdip, RM = SOIC, SO = 0.15" Small Outline IC (SOIC). REV. A -3- ADG419 ABSOLUTE MAXIMUM RATINGS 1 (TA= +25C unless otherwise noted) VDD to VSS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .+44 V VDD to GND . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3 V to +25 V VSS to GND . . . . . . . . . . . . . . . . . . . . . . . . . . +0.3 V to -25 V VL to GND . . . . . . . . . . . . . . . . . . . . . . -0.3 V to VDD + 0.3 V Analog, Digital Inputs2 . . . . . . . . . . . . VSS - 2 V to VDD + 2 V or 30 mA, Whichever Occurs First Continuous Current, S or D . . . . . . . . . . . . . . . . . . . . . 30 mA Peak Current, S or D . . . . . . . . . . . . . . . . . . . . . . . . . 100 mA (Pulsed at 1 ms, 10% Duty Cycle Max) Operating Temperature Range Industrial (B Version) . . . . . . . . . . . . . . . . . -40C to +85C Extended (T Version) . . . . . . . . . . . . . . . . -55C to +125C Storage Temperature Range . . . . . . . . . . . . . -65C to +150C Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . +150C Cerdip Package, Power Dissipation . . . . . . . . . . . . . . . 600 mW JA, Thermal Impedance . . . . . . . . . . . . . . . . . . . . 110C/W Lead Temperature, Soldering (10 sec) . . . . . . . . . . . +300C Plastic Package, Power Dissipation . . . . . . . . . . . . . . . 400 mW JA, Thermal Impedance . . . . . . . . . . . . . . . . . . . . 100C/W Lead Temperature, Soldering (10 sec) . . . . . . . . . . . +260C SOIC Package, Power Dissipation . . . . . . . . . . . . . . . . 400 mW JA, Thermal Impedance . . . . . . . . . . . . . . . . . . . . 155C/W SOIC Package, Power Dissipation . . . . . . . . . . . . . . . 315 mW JA, Thermal Impedance . . . . . . . . . . . . . . . . . . . . 205C/W Lead Temperature, Soldering Vapor Phase (60 sec). . . . . . . . . . . . . . . . . . . . . . . +215C Infrared (15 sec) . . . . . . . . . . . . . . . . . . . . . . . . . . +220C NOTES 1 Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those listed in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Only one absolute maximum rating may be applied at any one time. 2 Overvoltages at IN, S or D will be clamped by internal diodes. Current should be limited to the maximum ratings given. CAUTION ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although the ADG419 features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality. WARNING! ESD SENSITIVE DEVICE TERMINOLOGY VDD VSS VL GND S D IN RON IS (OFF) ID (OFF) ID, IS (ON) VD (VS) CS (OFF) Most positive power supply potential. Most negative power supply potential in dual supplies. In single supply applications, it may be connected to GND. Logic power supply (+5 V). Ground (0 V) reference. Source terminal. May be an input or an output. Drain terminal. May be an input or an output. Logic control input. Ohmic resistance between D and S. Source leakage current with the switch "OFF." Drain leakage current with the switch "OFF." Channel leakage current with the switch "ON." Analog voltage on terminals D, S. "OFF" switch source capacitance. CD, CS (ON) tTRANSITION tD VINL VINH IINL (IINH) Crosstalk Off Isolation IDD ISS "ON" switch capacitance. Delay time between the 50% and 90% points of the digital inputs and the switch "ON" condition when switching from one address state to another. "OFF" time or "ON" time measured between the 90% points of both switches when switching from one address state to the other. Maximum input voltage for logic "0." Minimum input voltage for logic "1." Input current of the digital input. A measure of unwanted signal which is coupled through from one channel to another as a result of parasitic capacitance. A measure of unwanted signal coupling through an "OFF" channel. Positive supply current. Negative supply current. -4- REV. A Typical Performance Characteristics-ADG419 50 TA = +25 C 40 VDD = +5V VSS = -5V 100 TA = +25 C 80 VDD = +5V VSS = 0V 30 RON - RON - VDD = +10V VSS = -10V 60 VDD = +10V VSS = 0V 40 VDD = +12V VSS = 0V 20 VDD = +12V VSS = -12V VDD = +15V VSS = -15V 0 -15 -10 -5 0 VS , VD - Volts 5 10 15 10 20 VDD = +15V VSS = 0V 0 0 5 VS , VD - Volts 10 15 Figure 1. RON as a Function of VD (VS): Dual Supply Voltage Figure 4. RON as a Function of VD (VS): Single Supply Voltage 50 VDD = +15V VSS = -15V VL = +5V 100 VDD = +12V VSS = 0V VL = +5V 40 80 30 RON - RON - 60 +125 C +125 C 20 40 10 +85 C +25 C 20 +85 C +25 C 0 -15 -10 -5 0 VS , VD - Volts 0 5 10 15 0 3 6 VS , VD - Volts 9 12 Figure 2. RON as a Function of VD (VS) for Different Temperatures Figure 5. RON as a Function of VD (VS) for Different Temperatures 0.02 VDD = +15V VSS = -15V TA = +25 C IS (OFF) 0.00 ID (OFF) ID (ON) 0.006 VDD = +12V VSS = 0V TA = +25 C 0.01 LEAKAGE CURRENT - nA 0.004 LEAKAGE CURRENT - nA ID (ON) 0.002 IS (OFF) -0.01 0.000 ID (OFF) - 0.02 -0.002 -0.03 -15 -10 -5 0 VS , VD - Volts -0.004 5 10 15 0 2 4 6 VS , VD - Volts 8 10 12 Figure 3. Leakage Currents as a Function of VS (VD) Figure 6. Leakage Currents as a Function of VS (VD) REV. A -5- ADG419 10mA 1mA VDD = +15V VSS = -15V VL = +5V I+, I- 220 200 100 A I SUPPLY 10 A 180 tTRANSITION - ns 160 SINGLE SUPPLY VIN = 0V/5V 1A IL 100nA 140 120 100 80 DUAL SUPPLY VIN = 5V 10nA 1nA 102 103 104 105 FREQUENCY - Hz 106 107 6 8 10 12 SUPPLY VOLTAGE - Volts 14 16 Figure 7. Supply Current vs. Input Switching Frequency Figure 8. Transition Time vs. Power Supply Voltage Test Circuits IDS V1 IS (OFF) S D ID (OFF) S VS D ID (ON) S VS D VS VD VD RON = V1/IDS Test Circuit 1. On Resistance Test Circuit 2. Off Leakage Test Circuit 3. On Leakage +15V VDD S1 VS1 VS2 S2 IN VIN GND +5V 3V VL D VOUT RL 300 CL 35pF OUTPUT VSS 90% VIN 0V 50% 50% tTRANSITION tTRANSITION 90% -15V Test Circuit 4. Transition Time, tTRANSITION +15V VDD VS1 VS2 S1 S2 IN VIN GND VSS +5V VL D VOUT RL 300 CL 35pF ADDRESS DRIVE(VIN) 0V 3V tD VOUT 0.9VO 0.9VO 0.9VO tD 0.9VO -15V Test Circuit 5. Break-Before-Make Time Delay, tD -6- REV. A ADG419 +15V 0.1 F +15V 0.1 F +5V 0.1 F +5V 0.1 F VDD S1 VL VDD S VL D VOUT RL 50 VS VOUT S2 RL 50 VIN GND VSS D 50 IN GND VIN 0.1 F -15V VSS VS 0.1 F -15V CHANNEL-TO-CHANNEL CROSSTALK = 20 LOG | VS/VOUT | Test Circuit 6. Off Isolation Test Circuit 7. Crosstalk REV. A -7- ADG419 OUTLINE DIMENSIONS Dimensions shown in inches and (mm). 8-Lead Plastic DIP (N-8) 0.430 (10.92) 0.348 (8.84) 8 5 8-Lead Cerdip (Q-8) 0.005 (0.13) MIN 0.055 (1.4) MAX 5 0.280 (7.11) 0.240 (6.10) 1 4 8 PIN 1 0.210 (5.33) MAX 0.060 (1.52) 0.015 (0.38) 0.130 (3.30) MIN SEATING PLANE 0.325 (8.25) 0.300 (7.62) 0.195 (4.95) 0.115 (2.93) 0.310 (7.87) 0.220 (5.59) 1 4 PIN 1 0.405 (10.29) 0.060 (1.52) MAX 0.015 (0.38) 0.320 (8.13) 0.290 (7.37) 0.160 (4.06) 0.115 (2.93) 0.022 (0.558) 0.100 0.070 (1.77) 0.014 (0.356) (2.54) 0.045 (1.15) BSC 0.015 (0.381) 0.008 (0.204) 0.200 (5.08) MAX 0.150 (3.81) 0.200 (5.08) MIN 0.125 (3.18) 0.023 (0.58) 0.100 0.070 (1.78) SEATING PLANE 0.014 (0.36) (2.54) 0.030 (0.76) BSC 15 0 0.015 (0.38) 0.008 (0.20) 8-Lead SOIC (RM-8) 0.122 (3.10) 0.114 (2.90) 8-Lead SOIC (SO-8) (Narrow Body) 0.1968 (5.00) 0.1890 (4.80) 8 1 5 4 8 5 0.122 (3.10) 0.114 (2.90) 1 0.199 (5.05) 0.187 (4.75) 4 0.1574 (4.00) 0.1497 (3.80) 0.2440 (6.20) 0.2284 (5.80) PIN 1 0.0256 (0.65) BSC 0.120 (3.05) 0.112 (2.84) 0.006 (0.15) 0.002 (0.05) 0.018 (0.46) SEATING 0.008 (0.20) PLANE 0.043 (1.09) 0.037 (0.94) 0.011 (0.28) 0.003 (0.08) 0.120 (3.05) 0.112 (2.84) 33 27 PIN 1 0.0098 (0.25) 0.0040 (0.10) 0.0688 (1.75) 0.0532 (1.35) 0.0196 (0.50) x 45 0.0099 (0.25) 0.0500 0.0192 (0.49) SEATING (1.27) 0.0098 (0.25) PLANE BSC 0.0138 (0.35) 0.0075 (0.19) 8 0 0.0500 (1.27) 0.0160 (0.41) 0.028 (0.71) 0.016 (0.41) -8- REV. A PRINTED IN U.S.A. C1926a-0-9/98 |
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